The Raisonance C compiler for the STM8 and ST7 families is a highly optimized software development tool designed specifically to meet the requirements of engineers who are creating applications for resource constrained microcontrollers.
The Raisonance STM8 compiler benefits from more than 24 years of Raisonance experience in embedded electronics. The Raisonance compilers offer features and technologies that are specific to the requirements of microcontroller application design including:
Since its first version, the Raisonance toolchain has been extensively tested and benchmarked by Raisonance and customers. The purpose of that benchmarking was to ensure that a level of performance was attained during development and maintained with successive releases. Testing with standard benchmarks is complemented by anti-regression tests. In many cases, anti-regression tests come from microcontroller application examples which represent real-world cases that are specific to STM8 and ST7 microcontrollers.
For this benchmark, results were generated using the latest versions of the STM8 compilers that were available 25 April 2013 and for the Raisonance STM8 / ST7 toolchain version 2.50.13.0112, also released at that time.
Results are reported for for some widely used and freely distributed benchmark code. The benchmarks reported here include:
The latest benchmark testing shows that the Raisonance STM8 compiler clearly attains more compact code when applying equivalent code size optimizations.
In addition to a wide range of common code size and speed optimizations (Inlining, factorizing, peephole, ...), Raisonance software also facilitates access to and implementation of application-wide optimizations by integrating them into the Ride7 development environment. For example Ride7 allows users to apply a smart autorelocation optimization by simply checking the appropriate check box in the graphical interface. This project-level option initiates a dual build sequence that allows the compiler to intelligently order and locate variables to get optimal code-size results. These optimizations are also applied by the other compilers in this benchmark if available.
An additional column (Raisonance CC***) shows the results for the Raisonance compiler with CodeCompressor post link optimizations. Where getting additional reductions in code size is critical for the user, post link optimization can reduce code size by applying optimizations with a view of the full application code (and not module by module). Raisonance compiler results are already very effectively optimized for code size, so with the benchmarks, CodeCompressor resulted in additional 1% to 2% reductions in code size. These types of optimizations are also applied by the other compilers in this benchmark if available.
The graph shows results for common benchmarks for the three tested STM8 compilers using equivalent optimization settings. Code size results are in bytes.
Notes: * Whetstone results for all compilers are reported without printf. ** Dhrystone results for Raisonance with autorelocation optimization applied. *** Raisonance CC results show code sizes attained if the user applies the CodeCompressor post-link optimization.
The benchmark results are also detailed in the table below. Code size is reported in bytes. The main values of comparison are the output code size values after link. The values in parentheses are the intermediate code sizes after compiling. Whetstone* shows results for that benchmark excluding printf.
|Raisonance CC***||Raisonance||Compiler 2||Compiler 3|
|Whetstone *||(2020) 5975||(2020) 6017||(1606) 7063||(2221) 7288|
|Dhrystone**||(930) 2400||(930) 2457||(941) 3317||(1088) 3468|
|Sieve||(95) 971||(95) 991||(97) 970||(94) 2347|
|Towers||(461) 594||(461) 604||(478) 1398||(472) 2725|